Basic VLSI Design by Douglas A. Pucknell

By Douglas A. Pucknell

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Tt. svoo (>' ~ FIGURE 2. 7 nMOS Inverter transfer characteristic. d. where Z is determined by the length to width ratio of the transistor in question). 2. 7 [. 8 in which an inverter is driven from the output of another similar inverter. 8 nMOS inverter driven directly by another inverter. d. d. U-:,v -2 V, f smce . 3:_ ( L pd w vmv - v. :.... u. are the widths and lengths of the pull-down and pull-up transistors respectively. d. u. d. :.... u. d. d. = 4/1 for an inverter directly driven by an inverter.

Latch-up problems can be considerably reduced by using a low-resistivity epitaxial p-type substrate as the starting material, which can subsequently act as a very low resistance ground-plane to collect substrate currents. However, a factor of the n-well process is that the performance of the already poorly performing p-transistor is even further degraded. Modern process lines have come to grips with these problems, and good device performance may be achieved for both p-well and n-well fabrication.

A small current now flows through the inverter from V00 to V55 . If we wish to analyze the behavior in this region, we equate the p-device resistive region current with the n-device saturation current and thus obtain the voltage and current relationships. Region 4 is similar to region 2 but with the roles of the p- and n-transistors reversed. However, the current magnitudes in regions 2 and 4 are small and most of the energy consumed in switching from one state to the other is due to the larger current which flows in region 3.

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